1. Field of the Invention
The present invention relates generally to a sigma-delta analog-to-digital converter which can have a high resolution, and more particularly to an improved sigma-delta analog-to-digital converter using a mixed mode integrator composed of an analog integrator and a digital integrator, which can prevent the performance degradation due to the distortion of an analog circuit, i.e., the saturation of an integrator or the overload of a quantizer.
2. Description of the Related Art
A general sigma-delta analog-to-digital converter has an anti-aliasing filter, a sample and hold circuit, a sigma-delta modulator and a decimation filter, as shown in FIG. 1b. 
The sigma-delta analog-to-digital converter of such construction can ensure high resolution with the help of the oversampling and the signal processing in a digital area without requiring high accuracy analog circuit and filter, and with this reason, it is widely used as a converter of an audio signal or a baseband signal requiring high resolution. However, this converter has a problem that an analog signal of high frequency cannot be converted to a digital signal because it uses the oversampling. That is, if an oversampling ratio is raised, the resolution can be improved, but the frequency of the convertible analog signal becomes lowered, thus limiting the application field thereof.
Meanwhile, there are two methods to enhance the resolution of the sigma-delta analog-to-digital converter without increasing the oversampling ratio.
The first method is that quantization is executed by multi-bits instead of 1 bit. However, this method requires a multi-bit DAC (digital-to-analog converter) having a linearity of high resolution, resulting in a complicated circuit design and a high manufacturing cost. Two conventional methods have been proposed to solve this problem: one is to correct the nonlinearity of the multi-bit DAC in a digital signal processing and the other is to execute the multi-bit quantization without using the multi-bit DAC. But such techniques is limited to a specific modulator construction and requires a complicated construction.
The second method is to raise the order of the sigma-delta converter. However, in the case of a higher order modulator over a third order, the converter becomes unstable. Such an instability of the higher order modulator is associated with the leakage of the output of an integrator of the modulator and this leakage causes the saturation due to the limit of a linear region of the analog integrator or the overload of the quantizer, resulting in a rapid performance degradation of the sigma-delta modulator. That is, the voltages on the output of the analog integrator of the analog-to-digital converter are continuously increased or reduced and are finally limited by a power. In fact, the voltages are passed over the linear region of the operation amplifier before that, and thus it is impossible to ensure a normal operation. Such a phenomenon is called a saturation or an overload, and this can affect the stability of the converter. Particularly, the higher the order of the sigma-delta analog-to-digital converter is, the more unstable the whole system is. Further, the harmonic distortion at the output signal components of the modulator causes the reduction of the signal to noise ratio of the outputs, thus deteriorating the resolution of the converter.
To solve such a problem that a higher order sigma-delta analog-to-digital modulator becomes unstable, several methods have been used.
The first method is to control the gain and feedback gain of the integrator by a simulation. However, since there are many variables to be considered, it is impossible to perform a simulation on all cases, and thus this is a rather unstable method.
The second method is to provide an interpolative modulator which designs the transmission characteristic of an analog modulator with a filter concept. However, the counter of the filter requires a higher accuracy.
The third method is to provide a cascaded modulator known as MASH configuration, but this requires an exact matching between cascaded blocks.
It is therefore, an object of the present invention to provide a sigma-delta analog-to-digital converter which ensures the stability of a higher order modulator, prevents the performance degradation by removing a saturation or overload phenomenon of a modulator in the converter by applying a mixed mode integrator to the sigma-delta analog-to-digital converter and performs a multi-bit quantization without a multi-bit DAC